1. Field of the Invention
The present invention relates to a method for forming a semiconductor device. More particularly, the present invention relates to a method for forming a MOS field effect transistor (MOSFET).
2. Description of the Related Art
An integrated circuit (IC) is composed of many devices and isolation structures that isolate the devices. The isolation structures, such as STI structure or field oxide isolation structure, are used to prevent carriers from moving between devices. Conventionally, the isolation structures are formed within a concentrated semiconductor circuit, for example, between adjacent field effect transistors (FET) in a dynamic random access memory (DRAM), to reduce a leakage current produced by the FET.
An isolation region is formed in an integrated circuit for preventing a short circuit from occurring between adjacent device regions on a substrate. Conventionally, a local oxidation of silicon (LOCOS) technique is widely utilized in the semiconductor industry to provide isolation regions on semiconductor device. However, since internal stress is generated and bird's beak encroachment occurs in the isolation structures, LOCOS cannot effectively isolate devices.
The shallow trench isolation (STI) technique has been developed to improve the bird's beak encroachment of the LOCOS so as to achieve an effective isolation structure. Typically, the STI process comprises the steps of using a mask to define and pattern a shallow trench in a substrate by an anisotropic etching process, and then filling the shallow trench with oxide for use as a device isolation structure. Since the shallow trench isolation structure has a good isolation effect and its size is scaleable, it is often employed as a device isolation structure. The shallow trench isolation is the preferred isolation technique, especially for the fabrication of a metal oxide semiconductor transistor.
Conventionally, the sidewalls of the shallow trench isolation structure are usually perpendicular to the substrate surface; that is, the corner of the shallow trench isolation structure is a right angle. As a result, high stress occurs at the corner of the shallow trench isolation structure. The stress leads to damage of the silicon lattices in the substrate surface; thus dislocation is generated. In a subsequent step, a gate oxide layer formed on the substrate is not able to form a predetermined thickness because the silicon lattices of the substrate surface are damaged. Therefore, a leakage current occurs at the corner of the shallow trench isolation structure.